
117
AT89C51RB2/RC2
4180E–8051–10/06
Shift Register Timing
Waveforms
External Clock Drive
Waveforms
AC Testing Input/Output
Waveforms
AC inputs during testing are driven at VCC - 0.5 for a logic “1” and 0.45V for a logic “0”.
Timing measurement are made at VIH min for a logic “1” and VIL max for a logic “0”.
Float Waveforms
For timing purposes as port pin is no longer floating when a 100 mV change from load
voltage occurs and begins to float when a 100 mV change from the loaded VOH/VOL level
occurs. IOL/IOH ≥ ± 20mA.
Clock Waveforms
Valid in normal clock mode. In X2 mode XTAL2 must be changed to XTAL2/2.
INPUT DATA
VALID
01
2345
6
8
7
ALE
CLOCK
OUTPUT DATA
WRITE to SBUF
CLEAR RI
T
XLXL
T
QVXH
T
XHQX
T
XHDV
T
XHDX
SET TI
SET RI
INSTRUCTION
01
2345
67
VALID
VCC-0.5V
0.45V
0.7V
CC
0.2VCC-0.1
T
CHCL
T
CLCX
T
CLCL
T
CLCH
T
CHCX
INPUT/OUTPUT
0.2 VCC + 0.9
0.2 VCC - 0.1
VCC -0.5V
0.45 V
FLOAT
VOH - 0.1 V
VOL + 0.1 V
V
LOAD
V
LOAD + 0.1 V
VLOAD - 0.1 V